CTRL¶
Register Listing for CTRL¶
Register |
Address |
|---|---|
CTRL_SCRATCH¶
Address: 0xe0000000 + 0x4 = 0xe0000004
Use this register as a scratch space to verify that software read/write accesses to the Wishbone/CSR bus are working correctly. The initial reset value of 0x1234578 can be used to verify endianness.
CTRL_BUS_ERRORS¶
Address: 0xe0000000 + 0x8 = 0xe0000008
Total number of Wishbone bus errors (timeouts) since last reset.